Communication products, such as two-way radios, cell phones, and the like, utilize frequency synthesizer circuits and frequency synthesis applications as a means of generating stable signals for use during transmit and receive modes of operation. Delay locked loop (DLL) circuits and phase locked loop (PLL) circuits typically form, either together or individually, a major part of the frequency synthesizer for any communication product. The DLL can be used in direct digital synthesis (DDS) applications while the PLL is typically utilized in more conventional frequency synthesis applications.
The use of a DLL and DLL applications may incur static phase offset errors which can generate spurs in the output signal. These spurs in the output signal are not desirable in a signal source that is used as a local oscillator in any transceiver system, as they might cause unwanted signals to appear along with the wanted signals. These spurs adversely affect blocking performance (e.g. adjacent channel), self quieters, spectral mask capabilities and electro-magnetic interference (EMI) in transceiver systems. Static phase offset errors inherent in these types of synthesizers are thus problematic.
The use of PLL and multiple loop PLL applications may incur static phase offset mismatch errors between loops which can create spurious glitches in a transient response that can negatively impact loop settling time. Static phase offset errors inherent in these types of synthesizers are thus also problematic.
Static phase-lock offset mismatch errors in adaptive loop bandwidth DLL/PLL systems is a dominant contributor to degrading synthesizer settling time. Therefore, adaptive-bandwidth DLL/PLL systems with large offset errors suffer from protracted settling times, negating much of the benefit of an adaptive-bandwidth scheme.
Additionally, the complexity and variation (across process, voltage, temperature) of current DLL and PLL and DLL/PLL systems burden users with expertise requirements, programming requirements and excessive system characterization requirements.
Accordingly, there is need for an improved approach to correcting static phase offset errors within frequency synthesizers of communication devices.
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